Counter Simulator
Set the modulus and direction, clock it, and watch the binary bit lamps toggle and wrap at the top.
What it does: Interactive demo of a modulo-N up/down counter: each clock counts ±1, showing how the binary bits toggle.
When to use it: Learning counters/frequency division, understanding carry and wraparound, or memorizing the bit-count to modulus relationship.
MEANS —
No history yet. Each calculation is automatically saved to this device.
How to use the counter simulator
Set modulus and direction → clock/auto → watch the bit lamps wrap.
- 01
Set the modulus and direction
Modulus N (e.g. 16=4-bit binary, 10=decimal) and up/down counting. The required bit count = ⌈log₂N⌉, computed automatically.
- 02
Clock it and watch the carry
Click "Clock ↑" to single-step, or "Auto" to run continuously — watch how the binary bit lamps toggle bit by bit and wrap at the top.
- 03
Observe the wraparound
Counting up wraps from N−1 back to 0, counting down wraps from 0 back to N−1; the history marks the wraparound points.
Common counter moduli
The modulus determines the counting range and the required number of flip-flop bits.
| Modulus N | Range | Bits | Common name |
|---|---|---|---|
| 2 | 0–1 | 1 | Divide-by-2 / T |
| 8 | 0–7 | 3 | 3-bit binary |
| 10 | 0–9 | 4 | Decimal / decade |
| 16 | 0–15 | 4 | 4-bit binary |
| 60 | 0–59 | 6 | Seconds/minutes count |
Modulo-N counter: bits = ⌈log₂N⌉.
Common questions, answered in 3 minutes
Why does modulo 10 also need 4 bits?
4 bits can represent 0–15; modulo 10 uses only 0–9 of them and, after reaching 9, uses feedback logic to clear back to 0. So the bit count is figured from holding N−1, i.e. ⌈log₂N⌉=4.
Are up-counter and down-counter circuits very different?
They differ in the carry/borrow logic and toggle conditions; this tool demonstrates the ideal next state, where the direction only decides +1 or −1 and wraps accordingly.
Why does the lowest bit toggle the fastest?
The least significant bit (LSB) toggles on every clock, the next bit toggles once every two beats… each higher bit halves the frequency, which is exactly the basis of binary counting and frequency division.
What is the difference between asynchronous and synchronous counters?
In an asynchronous (ripple) counter each stage is triggered by the previous stage's output, with cumulative delay; in a synchronous counter all flip-flops share one clock, so it is fast with no cumulative delay. This tool does not model delay and only demonstrates the sequence of count values.
Can it count to any N?
You can set any modulus ≥2; the tool shows enough bit lamps per ⌈log₂N⌉ and wraps between N−1 and 0.
Standards and sources referenced by this tool
| Item | Value / Formula | Source |
|---|---|---|
| Modulo-N counting | count⁺=(count±1) mod N | Digital logic standard |
| Bit count | ⌈log₂N⌉ | Binary representation |
Ideal next-state model, no propagation delay, no external API.